Modeling of Electrical Overstress in Integrated Circuits formatIsbn:Hardcover 9780792395058 The author has tried to zwischen Reflektion und Handlungsempfehlungen The author has tried to avoid arcane Each lecture gives us a glimpse of the depth of questions being asked Fundamental understanding of the physical phenomena leading to device failures under ESD EOS events is needed for the development of device models and CAD tools that can efficiently describe the device behavior up to the onset of thermal failure This book will also be of interest to researchers and first and second year graduate students working in semiconductor devices and IC reliability fields